Prior art approaches known to the present inventors include providing multiple I/O resolved address registers for each I/O device connected to the shared I/O control unit. Another known prior art approach is to make the address resolution apparatus so fast that multiple I/O resolved address registers are not necessary. The latter solution of course is not feasible, if the computer system architecture would not lend itself to such a change. In some instances the I/O shared control unit may be added to an existing computer system and it isn't feasible to restructure the address resolution apparatus as compared to the shared register approach of the present invention. Extensive data buffering could be used to avoid overrun but that would be relatively more expensive. Pre-allocation rather than dynamic allocation of storage also eliminates the problem but is not storage efficient. Pre-allocation reduces the address resolution burden during data transfers because storage space for the data transfer can be made contiguous whereas in dynamic allocation storage space is likely to be non-contiguous.